Information
There has been much written about the use of processor models to assist in the development of software. Back in the 1970′s the early versions of Unix on a PDP11 included a simulator of the Motorola 6800 – one of the first Instruction Set Simulators made readily available. It ran very slowly and its focus was to explore the details of the instructions. Today processor models and simulators can have various usage targets.
The models listed on this site are all available from OVP and are written to be Instruction Accurate and are targeting the development of embedded software. Please search elsewhere for models to be used to test pipelines, cache behaviors, branch predictors and other aspects related to low level performance or power analysis of cpu architectures.
These Information pages list some of the relevant companies, organizations, and players in the CPU modeling and Virtual Platforms ecosystem.
The Information menu provides access to several pages of information:
The page information/using-fast-cpu-models-in-c-platforms/ provides information and links about how to use the OVP Fast Processor Models in C Platforms.
The page information/using-systemc-tlm2-processor-models/ provides information and links about how to use the OVP Fast Processor Models in SystemC with TLM2.
The page emulation-model.com/information/downloading-the-models/ introduces how to get the models and install/use them.
The links page provides links and information on the Fast CPU Models and Virtual Platform ecosystem..
There is also a glossary page and a news page.
If you feel more and different information would be useful – please let Imperas know at info@imperas.com.
Currently available Fast Processor Model Families.